#pragma once // @generated by torchgen/gen.py from Operator.h #include #include // Forward declarations of any types needed in the operator signatures. // We can't directly include these classes because it will cause circular include dependencies. // This file is included by TensorBody.h, which defines the Tensor class. #include namespace at { namespace _ops { struct TORCH_API randint { using schema = at::Tensor (int64_t, c10::SymIntArrayRef, c10::optional, c10::optional, c10::optional, c10::optional); using ptr_schema = schema*; // See Note [static constexpr char* members for windows NVCC] STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(name, "aten::randint") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(overload_name, "") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(schema_str, "randint(int high, SymInt[] size, *, ScalarType? dtype=long, Layout? layout=None, Device? device=None, bool? pin_memory=None) -> Tensor") static at::Tensor call(int64_t high, c10::SymIntArrayRef size, c10::optional dtype, c10::optional layout, c10::optional device, c10::optional pin_memory); static at::Tensor redispatch(c10::DispatchKeySet dispatchKeySet, int64_t high, c10::SymIntArrayRef size, c10::optional dtype, c10::optional layout, c10::optional device, c10::optional pin_memory); }; struct TORCH_API randint_generator { using schema = at::Tensor (int64_t, c10::SymIntArrayRef, c10::optional, c10::optional, c10::optional, c10::optional, c10::optional); using ptr_schema = schema*; // See Note [static constexpr char* members for windows NVCC] STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(name, "aten::randint") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(overload_name, "generator") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(schema_str, "randint.generator(int high, SymInt[] size, *, Generator? generator, ScalarType? dtype=long, Layout? layout=None, Device? device=None, bool? pin_memory=None) -> Tensor") static at::Tensor call(int64_t high, c10::SymIntArrayRef size, c10::optional generator, c10::optional dtype, c10::optional layout, c10::optional device, c10::optional pin_memory); static at::Tensor redispatch(c10::DispatchKeySet dispatchKeySet, int64_t high, c10::SymIntArrayRef size, c10::optional generator, c10::optional dtype, c10::optional layout, c10::optional device, c10::optional pin_memory); }; struct TORCH_API randint_low { using schema = at::Tensor (int64_t, int64_t, c10::SymIntArrayRef, c10::optional, c10::optional, c10::optional, c10::optional); using ptr_schema = schema*; // See Note [static constexpr char* members for windows NVCC] STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(name, "aten::randint") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(overload_name, "low") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(schema_str, "randint.low(int low, int high, SymInt[] size, *, ScalarType? dtype=long, Layout? layout=None, Device? device=None, bool? pin_memory=None) -> Tensor") static at::Tensor call(int64_t low, int64_t high, c10::SymIntArrayRef size, c10::optional dtype, c10::optional layout, c10::optional device, c10::optional pin_memory); static at::Tensor redispatch(c10::DispatchKeySet dispatchKeySet, int64_t low, int64_t high, c10::SymIntArrayRef size, c10::optional dtype, c10::optional layout, c10::optional device, c10::optional pin_memory); }; struct TORCH_API randint_low_generator { using schema = at::Tensor (int64_t, int64_t, c10::SymIntArrayRef, c10::optional, c10::optional, c10::optional, c10::optional, c10::optional); using ptr_schema = schema*; // See Note [static constexpr char* members for windows NVCC] STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(name, "aten::randint") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(overload_name, "low_generator") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(schema_str, "randint.low_generator(int low, int high, SymInt[] size, *, Generator? generator, ScalarType? dtype=long, Layout? layout=None, Device? device=None, bool? pin_memory=None) -> Tensor") static at::Tensor call(int64_t low, int64_t high, c10::SymIntArrayRef size, c10::optional generator, c10::optional dtype, c10::optional layout, c10::optional device, c10::optional pin_memory); static at::Tensor redispatch(c10::DispatchKeySet dispatchKeySet, int64_t low, int64_t high, c10::SymIntArrayRef size, c10::optional generator, c10::optional dtype, c10::optional layout, c10::optional device, c10::optional pin_memory); }; struct TORCH_API randint_out { using schema = at::Tensor & (int64_t, c10::SymIntArrayRef, at::Tensor &); using ptr_schema = schema*; // See Note [static constexpr char* members for windows NVCC] STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(name, "aten::randint") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(overload_name, "out") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(schema_str, "randint.out(int high, SymInt[] size, *, Tensor(a!) out) -> Tensor(a!)") static at::Tensor & call(int64_t high, c10::SymIntArrayRef size, at::Tensor & out); static at::Tensor & redispatch(c10::DispatchKeySet dispatchKeySet, int64_t high, c10::SymIntArrayRef size, at::Tensor & out); }; struct TORCH_API randint_generator_out { using schema = at::Tensor & (int64_t, c10::SymIntArrayRef, c10::optional, at::Tensor &); using ptr_schema = schema*; // See Note [static constexpr char* members for windows NVCC] STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(name, "aten::randint") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(overload_name, "generator_out") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(schema_str, "randint.generator_out(int high, SymInt[] size, *, Generator? generator, Tensor(a!) out) -> Tensor(a!)") static at::Tensor & call(int64_t high, c10::SymIntArrayRef size, c10::optional generator, at::Tensor & out); static at::Tensor & redispatch(c10::DispatchKeySet dispatchKeySet, int64_t high, c10::SymIntArrayRef size, c10::optional generator, at::Tensor & out); }; struct TORCH_API randint_low_out { using schema = at::Tensor & (int64_t, int64_t, c10::SymIntArrayRef, at::Tensor &); using ptr_schema = schema*; // See Note [static constexpr char* members for windows NVCC] STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(name, "aten::randint") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(overload_name, "low_out") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(schema_str, "randint.low_out(int low, int high, SymInt[] size, *, Tensor(a!) out) -> Tensor(a!)") static at::Tensor & call(int64_t low, int64_t high, c10::SymIntArrayRef size, at::Tensor & out); static at::Tensor & redispatch(c10::DispatchKeySet dispatchKeySet, int64_t low, int64_t high, c10::SymIntArrayRef size, at::Tensor & out); }; struct TORCH_API randint_low_generator_out { using schema = at::Tensor & (int64_t, int64_t, c10::SymIntArrayRef, c10::optional, at::Tensor &); using ptr_schema = schema*; // See Note [static constexpr char* members for windows NVCC] STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(name, "aten::randint") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(overload_name, "low_generator_out") STATIC_CONSTEXPR_STR_INL_EXCEPT_WIN_CUDA(schema_str, "randint.low_generator_out(int low, int high, SymInt[] size, *, Generator? generator, Tensor(a!) out) -> Tensor(a!)") static at::Tensor & call(int64_t low, int64_t high, c10::SymIntArrayRef size, c10::optional generator, at::Tensor & out); static at::Tensor & redispatch(c10::DispatchKeySet dispatchKeySet, int64_t low, int64_t high, c10::SymIntArrayRef size, c10::optional generator, at::Tensor & out); }; }} // namespace at::_ops