atomicops.h 6.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150
  1. // Copyright (c) 2012 The Chromium Authors. All rights reserved.
  2. // Use of this source code is governed by a BSD-style license that can be
  3. // found in the LICENSE file.
  4. // For atomic operations on reference counts, see atomic_refcount.h.
  5. // For atomic operations on sequence numbers, see atomic_sequence_num.h.
  6. // The routines exported by this module are subtle. If you use them, even if
  7. // you get the code right, it will depend on careful reasoning about atomicity
  8. // and memory ordering; it will be less readable, and harder to maintain. If
  9. // you plan to use these routines, you should have a good reason, such as solid
  10. // evidence that performance would otherwise suffer, or there being no
  11. // alternative. You should assume only properties explicitly guaranteed by the
  12. // specifications in this file. You are almost certainly _not_ writing code
  13. // just for the x86; if you assume x86 semantics, x86 hardware bugs and
  14. // implementations on other archtectures will cause your code to break. If you
  15. // do not know what you are doing, avoid these routines, and use a Mutex.
  16. //
  17. // It is incorrect to make direct assignments to/from an atomic variable.
  18. // You should use one of the Load or Store routines. The NoBarrier
  19. // versions are provided when no barriers are needed:
  20. // NoBarrier_Store()
  21. // NoBarrier_Load()
  22. // Although there are currently no compiler enforcement, you are encouraged
  23. // to use these.
  24. //
  25. #ifndef BASE_ATOMICOPS_H_
  26. #define BASE_ATOMICOPS_H_
  27. #include <stdint.h>
  28. // Small C++ header which defines implementation specific macros used to
  29. // identify the STL implementation.
  30. // - libc++: captures __config for _LIBCPP_VERSION
  31. // - libstdc++: captures bits/c++config.h for __GLIBCXX__
  32. #include <cstddef>
  33. #include "base/base_export.h"
  34. #include "build/build_config.h"
  35. namespace base {
  36. namespace subtle {
  37. typedef int32_t Atomic32;
  38. #ifdef ARCH_CPU_64_BITS
  39. // We need to be able to go between Atomic64 and AtomicWord implicitly. This
  40. // means Atomic64 and AtomicWord should be the same type on 64-bit.
  41. #if defined(__ILP32__) || defined(OS_NACL)
  42. // NaCl's intptr_t is not actually 64-bits on 64-bit!
  43. // http://code.google.com/p/nativeclient/issues/detail?id=1162
  44. typedef int64_t Atomic64;
  45. #else
  46. typedef intptr_t Atomic64;
  47. #endif
  48. #endif
  49. // Use AtomicWord for a machine-sized pointer. It will use the Atomic32 or
  50. // Atomic64 routines below, depending on your architecture.
  51. typedef intptr_t AtomicWord;
  52. // Atomically execute:
  53. // result = *ptr;
  54. // if (*ptr == old_value)
  55. // *ptr = new_value;
  56. // return result;
  57. //
  58. // I.e., replace "*ptr" with "new_value" if "*ptr" used to be "old_value".
  59. // Always return the old value of "*ptr"
  60. //
  61. // This routine implies no memory barriers.
  62. Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr,
  63. Atomic32 old_value,
  64. Atomic32 new_value);
  65. // Atomically store new_value into *ptr, returning the previous value held in
  66. // *ptr. This routine implies no memory barriers.
  67. Atomic32 NoBarrier_AtomicExchange(volatile Atomic32* ptr, Atomic32 new_value);
  68. // Atomically increment *ptr by "increment". Returns the new value of
  69. // *ptr with the increment applied. This routine implies no memory barriers.
  70. Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr, Atomic32 increment);
  71. Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
  72. Atomic32 increment);
  73. // These following lower-level operations are typically useful only to people
  74. // implementing higher-level synchronization operations like spinlocks,
  75. // mutexes, and condition-variables. They combine CompareAndSwap(), a load, or
  76. // a store with appropriate memory-ordering instructions. "Acquire" operations
  77. // ensure that no later memory access can be reordered ahead of the operation.
  78. // "Release" operations ensure that no previous memory access can be reordered
  79. // after the operation. "Barrier" operations have both "Acquire" and "Release"
  80. // semantics.
  81. Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
  82. Atomic32 old_value,
  83. Atomic32 new_value);
  84. Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
  85. Atomic32 old_value,
  86. Atomic32 new_value);
  87. void NoBarrier_Store(volatile Atomic32* ptr, Atomic32 value);
  88. void Acquire_Store(volatile Atomic32* ptr, Atomic32 value);
  89. void Release_Store(volatile Atomic32* ptr, Atomic32 value);
  90. Atomic32 NoBarrier_Load(volatile const Atomic32* ptr);
  91. Atomic32 Acquire_Load(volatile const Atomic32* ptr);
  92. Atomic32 Release_Load(volatile const Atomic32* ptr);
  93. // 64-bit atomic operations (only available on 64-bit processors).
  94. #ifdef ARCH_CPU_64_BITS
  95. Atomic64 NoBarrier_CompareAndSwap(volatile Atomic64* ptr,
  96. Atomic64 old_value,
  97. Atomic64 new_value);
  98. Atomic64 NoBarrier_AtomicExchange(volatile Atomic64* ptr, Atomic64 new_value);
  99. Atomic64 NoBarrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment);
  100. Atomic64 Barrier_AtomicIncrement(volatile Atomic64* ptr, Atomic64 increment);
  101. Atomic64 Acquire_CompareAndSwap(volatile Atomic64* ptr,
  102. Atomic64 old_value,
  103. Atomic64 new_value);
  104. Atomic64 Release_CompareAndSwap(volatile Atomic64* ptr,
  105. Atomic64 old_value,
  106. Atomic64 new_value);
  107. void NoBarrier_Store(volatile Atomic64* ptr, Atomic64 value);
  108. void Acquire_Store(volatile Atomic64* ptr, Atomic64 value);
  109. void Release_Store(volatile Atomic64* ptr, Atomic64 value);
  110. Atomic64 NoBarrier_Load(volatile const Atomic64* ptr);
  111. Atomic64 Acquire_Load(volatile const Atomic64* ptr);
  112. Atomic64 Release_Load(volatile const Atomic64* ptr);
  113. #endif // ARCH_CPU_64_BITS
  114. } // namespace subtle
  115. } // namespace base
  116. #if defined(OS_WIN) && defined(ARCH_CPU_X86_FAMILY)
  117. // TODO(jfb): Try to use base/atomicops_internals_portable.h everywhere.
  118. // https://crbug.com/559247.
  119. # include "base/atomicops_internals_x86_msvc.h"
  120. #else
  121. # include "base/atomicops_internals_portable.h"
  122. #endif
  123. // On some platforms we need additional declarations to make
  124. // AtomicWord compatible with our other Atomic* types.
  125. #if defined(OS_APPLE) || defined(OS_OPENBSD)
  126. #include "base/atomicops_internals_atomicword_compat.h"
  127. #endif
  128. #endif // BASE_ATOMICOPS_H_